As is well recognized, high resolution or definition TV sets require that conversions of the video signal sampling frequency be carried out automatically.
TV sets of that type comprise a decoder block for which the sampling frequency is set to a predetermined value which is usually four times the value of the subcarrier frequency Fsc for the television standard adopted, e.g. 17.7 MHz for the European standard known as PAL, and 14.3 MHz for the US standard NTSC.
But, where the TV set operation is more closely tied to the picture geometry, a multiple of the line frequency Mfl=13.5 MHz is used instead. Such is the case, for example, with a line-duplication operating technique, whereby the frequency at which the picture is displayed on the screen is duplicated to avoid the flicker that typically affects ordinary TV sets.
Thus, a frequency conversion becomes necessary between the sampled input video signal, with a sampling frequency f.sub.in =4 Fsc, and the output signal, with a line sampling frequency f.sub.out =M.sub.fl, if best operating conditions are to be ensured for both the decoder and the scan converter block. This conversion is represented in FIG. 1. Where the elements 100, 102, 014, 106 are components of a conventional high resolution television.
This frequency conversion is of vital importance to the video signal processing because a faulty conversion would result in loss of all the benefits of high resolution.
The prior art has proposed a frequency converting method which consists of performing in cascade a double conversion, digital-to-analog and analog-to-digital.
Basically, a signal to be converted, initially sampled at the input sampling frequency f.sub.in, is first rebuilt by translation from digital into analog by a D/A converter 108. Directly afterwards the analog signal is resampled at the desired output frequency fout by an A/D converter 110 as shown in FIG. 2. However, this known approach has the disadvantage of introducing high distortion in the signal, due to the double conversion.
To overcome this drawback, the prior art has proposed another solution which consists of performing a discrete time operation which is the equivalent of the digital-to-analog and analog-to-digital conversion sequence, using a sampling device. Alternatively, upsampling of the input signal by an upsample 112 followed by downsampling of the upsampled signal by a downsampler 114 may be used, as presented in FIG. 3. This approach has the drawbacks of high frequency clocks relating to the upsampler and great hardware redundancy.
This prior method does prevent the distortion introduced by the analog conversion, but involves the use of a sampling device of considerable complexity circuit-wise and the need to operate at high scanning frequencies.